CSIR Central

Design Methodology of Backside Contacted ISFETs using Deep Diffusion

IR@CEERI: CSIR-Central Electronics Engineering Research Institute, Pilani

View Archive Info
 
 
Field Value
 
Title Design Methodology of Backside Contacted ISFETs using Deep Diffusion
 
Creator Saxena, N
Nitharwal, M
Chaturvedi, A
Khanna, VK
Sharma, R
Mukhiya, R
 
Subject MEMS and Microsensors
 
Description Design approach of the fabrication method for Ion-Sensitive Field-Effect Transistor (ISFET) structures with contact pads located at back–passive side of the device is presented. In this approach, FET structure will be constructed on the front face of the chip. The connections between the source and the drain diffusion and the back contacts will be achieved by diffusing impurities from both sides of the wafer. The front surface has an insulating surface where the chemically active gate is placed. The device thus acts as a chemical sensor. This contrasts with traditional devices where the gate and the contacts are placed on the front surface of the transistor. This device will feature anisotropically etched cavities from the back side of the wafer to ensure electrical connections through the silicon wafer. These sensors will be more compact, easily mounted and will not have encapsulation problem; however, the fabrication technology will be more complex.
 
Date 2012
 
Type Conference or Workshop Item
PeerReviewed
 
Format application/pdf
 
Identifier http://ceeri.csircentral.net/78/1/47_2011.pdf
Saxena, N and Nitharwal, M and Chaturvedi, A and Khanna, VK and Sharma, R and Mukhiya, R (2012) Design Methodology of Backside Contacted ISFETs using Deep Diffusion. In: National Conference on Role of Electronics and Instrumentation for Rural Development (NCREIE - 2012), February 27 - 28, 2012, Jaipur, India. (Submitted)
 
Relation http://ceeri.csircentral.net/78/