Silicon Nanoparticles for Floating Gate Memory Application
IR@CEERI: CSIR-Central Electronics Engineering Research Institute, Pilani
View Archive Info| Field | Value | |
| Title |
Silicon Nanoparticles for Floating Gate Memory Application
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| Creator |
Prajesh, R
Kumar, S Kumar, A |
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| Subject |
Sensors and Nanotechnology
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| Description |
In this paper we demonstrate memory application of silicon Nano particles. A MOS capacitor with nanoparticles sandwiched between tunneling and capping oxide was fabricated and characterized. Write ‘1’ and write ‘0’ operations are verified by C-V measurements. Flat-band voltage shift in the C-V Curves explains the charge storage behavior of MOS capacitor. Interface charges, flat band and threshold voltages are estimated using Poisson’s equation and numerical methods.
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| Date |
2011
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| Type |
Conference or Workshop Item
PeerReviewed |
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| Format |
application/pdf
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| Identifier |
http://ceeri.csircentral.net/205/1/20_2011%283%29.pdf
Prajesh, R and Kumar, S and Kumar, A (2011) Silicon Nanoparticles for Floating Gate Memory Application. In: 16th International Workshop on the Physics of Semiconductor Devices (IWPSD - 2011), December 19 - 22, 2011, IIT Kanpur, India. (Submitted) |
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| Relation |
http://ceeri.csircentral.net/205/
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