Simulation and Characterization of Dual-Gate SOI MOSFET, On-chip Fabricated with ISFET
IR@CEERI: CSIR-Central Electronics Engineering Research Institute, Pilani
View Archive Info| Field | Value | |
| Title |
Simulation and Characterization of Dual-Gate SOI MOSFET, On-chip Fabricated with ISFET
|
|
| Creator |
Yadav, J
Sinha, S Sharma, A Chaudhary, R Mukhiya, R Sharma, R Khanna, VK |
|
| Subject |
MEMS and Microsensors
|
|
| Description |
The paper presents the process design, simulation and characterization of a silicon-on-insulator (SOI)-based dual-gate metal oxide field-effect transistor (DG MOSFET) with Al metal gate. The proposed structure is an N-channel device, using aluminum nitride (AlN) as gate dielectric. The fully depleted SOI-based DG ISFET compatible with the complementary metal-oxide-semiconductor (CMOS) process is considered to be a very promising bio-chemical sensor. Process design and simulations are performed by using Silvaco® TCAD tool. The simulated and experimental results are compared, and are found to be in good agreement.
|
|
| Date |
2015
|
|
| Type |
Conference or Workshop Item
PeerReviewed |
|
| Format |
application/pdf
|
|
| Identifier |
http://ceeri.csircentral.net/250/1/2_2015%283%29.pdf
Yadav, J and Sinha, S and Sharma, A and Chaudhary, R and Mukhiya, R and Sharma, R and Khanna, VK (2015) Simulation and Characterization of Dual-Gate SOI MOSFET, On-chip Fabricated with ISFET. In: 4th International Symposium on VLSI Design & Test (VDAT 2015), June 26-27, 2015, Institute of Technology, Nirma University, Ahmedabad. (Submitted) |
|
| Relation |
http://ceeri.csircentral.net/250/
|
|